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Dr. Rakhi Narang

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Assistant Professor Department of Electronics rnarang@svc.ac.in


Educational Qualifications

  • Ph. D. in Electronics (2014) from University of Delhi
  • M. Sc. (2007) and B. A. Sc. (2005) in Electronics from University of Delhi.

Areas of Specialization

  • Modeling and Simulation of Micro/Nanoelectronic Semiconductor Devices and Circuits

Administrative roles/ responsibilities

    														
1.	Member, NAAC extended committee, Criteria-II 
2.	Member, Skill enhancement course committee of South Cluster Knowledge hub.
3.	Member, Skill development center committee, SVC.
4.	Member of Departmental time table, AQAR compilation, Annual Festival and admission committee.
5.	Member of Departmental Magazine committee during the year 2016-2017, 2018-2019, 2022-23.
6.	Joint Secretary, IEEE EDS Delhi Chapter  from 2015-2018. 
7.	Treasurer, IEEE EDS Delhi Chapter from January 2019-till date

Courses Taught

  • B.Sc. (H) Electronics & B.Tech. Electronics
  • 																
1.	Upasana, Rakhi Narang, Manoj Saxena, and Mridula Gupta, “Linearity and Analog Performance Realization of Energy-Efficient TFET-Based Architectures: An Optimization for RFIC Design”, IETE Technical Review, Taylor & Francis, Vol. 33, no. 1, pp. 23-28, 2016.

2.	Upasana, Rakhi Narang, Manoj Saxena, and Mridula Gupta, “Drain Current Model for Hetero-Dielectric based TFET Architectures: Accumulation to Inversion Mode Analysis”, Journal of Nanoresearch, Vol. 36, pp. 31-43, 2016

3.	Upasana, Rakhi Narang, Manoj Saxena, and Mridula Gupta, “Investigation of Dielectric Pocket Induced Variations in Tunnel Field Effect Transistor”, Superlattices and Microstructures, Elsevier, Vol. 92, Pages 380-390 April 2016.

4.	Abhishek, Rakhi Narang, Manoj Saxena and Mridula Gupta, “Impact of Interfacial Fixed Charges on the Electrical Characteristics of Pocket-Doped Double Gate Tunnel FET”, IEEE Transactions of Device and Material Reliability, Vol. 16, no.2, pp. 117-122, 2016.

5.	Ajay, Rakhi Narang, Manoj Saxena and Mridula Gupta, “pH sensing Characteristics of Silicon on Insulator (SOI) Junctionless (JL) ISFET”, Advanced Science, Engineering and Medicine, Vol. 8, no. 12, pp. 960-967, 2016.

6.	Rakhi Narang, Manoj Saxena, and Mridula Gupta, “Numerical Analysis of Variability effects in Nanogap Embedded Dielectric Modulated Field Effect Transistor”, Advanced Science, Engineering and Medicine, Vol. 9, Number 2, pp. 155-161, February 2017.

7.	Ajay, R. Narang, M. Saxena and M. Gupta, “Analytical Model of pH sensing Characteristics of Junctionless Silicon on Insulator ISFET”, IEEE Transactions on Electron Devices, vol. 64, no. 4, pp. 1742-1750, April 2017.

8.	Upasana, Rakhi Narang, Manoj Saxena, Mridula Gupta, “Drain Current Model for Double Gate (DG) p-n-i-n TFET: Accumulation to Inversion Region of Operation”, Superlattices and Microstructures Volume 104, Pages 78–92, April 2017.

9.	Ajay, Rakhi Narang, Manoj Saxena, Mridula Gupta, “Novel junctionless electrolyte insulator semiconductor field-effect transistor (JL EISFET) and its application as pH/biosensor”, Microsystem and Technologies, Vol. 23 (8), pp. 3149-3159, August 2017.

10.	Ajay; R. Narang; M. Saxena; M. Gupta, “Modeling and Simulation Investigation of Sensitivity of Symmetric Split Gate Junctionless FET for Biosensing Application”, IEEE Sensors Journal, Vol. 17 (15), pp. 4853-4861, 2017.

11.	Ajay, R Narang, M Saxena, M Gupta, “Modeling of gate underlap junctionless double gate MOSFET as bio-sensor”, Materials Science in Semiconductor Processing 71, 240- 251, November 2017.

12.	Ajay Singh, Rakhi Narang, Manoj Saxena and Mridula Gupta, “Analysis of Electrolyte- Insulator-Semiconductor Tunnel Field-Effect Transistor as pH Sensor”, Communications in Computer and Information Science, vol 711 pp. 249-258.

13.	Rakhi Narang, Mridula Gupta and Manoj Saxena, “Improved Gate Modulation in Tunnel Field Effect Transistors with non-rectangular tapered Y-Gate geometry”, Communications in Computer and Information Science, vol. 711, pp. 463-473.

14.	Rakhi Narang, Gokulnath Rajendran, Mridula Gupta, Manoj Saxena, “Analytical Model for Tapered Gate Electrode Double Gate MOSFET Incorporating Fringing Field Effects”, Proceedings of IWPSD 2017, Springer Proceedings in Physics, Pages 697-705

15.	Upasana, Rakhi Narang, Manoj Saxena, M. Gupta, “Simulation Study on Stability Aspect of Dual Metal Dual Dielectric Based TFET Architectures Against Temperature Variations”, Proceedings of IWPSD 2017, Springer Proceedings in Physics, Pages 649- 655.

16.	Ajay, Rakhi Narang, Manoj Saxena, Mridula Gupta, “Investigation of Sensitivity of Gate Underlap Junctionless DG MOSFET for Biomolecules”, Proceedings of IWPSD 2017, Springer Proceedings in Physics, Pages 717-724

17.	M. Lakshmi Varshika, Rakhi Narang, Mridula Gupta, Manoj Saxena, “Analytical Modeling and Simulation Study of Homo and Hetero III-V Semiconductor Based Tunnel Field Effect Transistor (TFET)”, Proceedings of IWPSD 2017, Springer Proceedings in Physics Pages 1185-1194

18.	Avashesh Dubey, Rakhi Narang, Manoj Saxena, Mridula Gupta, “Floating Gate Junction-Less Double Gate Radiation Sensitive Field Effect Transistor (RADFET) Dosimeter: A Simulation Study” Proceedings of IWPSD 2017, Springer Proceedings in Physics, Pages 571-576

19.	Avashesh Dubey, Ajay, Rakhi Narang, Manoj Saxena and Mridula Gupta, “Modeling and Simulation of Junctionless Double Gate Radiation Sensitive FET (RADFET) Dosimeter”, IEEE Transactions on Nanotechnology, Volume: 17, Issue: 1, pp. 49-55, Jan. 2018

20.	Ajay, Rakhi Narang, Manoj Saxena, Mridula Gupta, “Two-dimensional (2D) analytical investigation of an n-type junctionless gate-all-around tunnel field-effect transistor (JL GAA TFET)”, Journal of Computational Electronics, Volume 17, Issue 2, pp 713–723, June 2018

21.	Ajay, Rakhi Narang, Manoj Saxena & Mridula Gupta, “Impact of positions of sensing area in channel of dielectric modulated MOSFET based biosensor”, Integrated Ferroelectrics: An International Journal, Volume 194, 2018 – Issue 1: International Symposium on Integrated Functionalities (ISIF 2017), Part II, Pages 63-71,

22.	Ajay, R. Narang, M. Saxena and M. Gupta, “Model of GaSb-InAs p-i-n Gate All Around BioTunnel FET,” IEEE Sensors Journal, vol. 19, no. 7, pp. 2605-2612, 1 April1, 2019.

23.	Upasana, Rakhi Narang, Manoj Saxena, Mridula Gupta, “Exploring the applicability of well optimized dielectric pocket tunnel transistor for future low power applications”, Superlattices and Microstructures, Volume 126, Pages 8-16, February 2019.

24.	Avashesh Dubey, Rakhi Narang, Manoj Saxena, MridulaGupta, “Investigation of total ionizing dose effect on SOI tunnel FET”, Superlattices and Microstructures, Elsevier, Volume 133, September 2019, 106186

25.	Monika Sharma, Rakhi Narang, Manoj Saxena, Mridula Gupta , “Comparative study of InGaN and InGaAs based dopingless TFET with different gate engineering techniques”, Advances in Natural Sciences: Nanoscience and Nanotechnology, IOP Science, Vol. 10, No. 3, August 2019.

26.	Monika Sharma, Rakhi Narang, Manoj Saxena, Mridula Gupta , “Optimized DL-TFET Design for Enhancing its Performance Parameters by Using Different Engineering Methods”, IETE Technical Review (Taylor and Francis), DOI: https://doi.org/10.1080/02564602.2020.1758226

27.	Avashesh Dubey, Rakhi Narang, Manoj Saxena, MridulaGupta, “Investigation of single event transient effects in Junctionless Accumulation Mode MOSFET”, IEEE Transactions on Device and Materials Reliability, Vol. 20, no. 3, pp. 604-608, Sept 2020
  • Award
  • Co-PI -Innovation Project on Development and testing of a Neural network based Object sorting robotic arm (SVC-308), funded by University of Delhi under innovation project scheme (Minor Project with grant of Rs. 5 Lacs during 2015-16)